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@ MIX-MMIX	@ SPARC


Web Sites
CMOSexod.com For advanced hobbyists: share free microprocessor and DSP IP cores written in Verilog or VHDL. http://www.cmosexod.com/
E-Risc Project to design and implement scaleable RISC microprocessor for embedded applications. All architecture and source code to be released under GNU General Public License, or a slightly modified version that includes hardware, not only software. http://www.geocities.com/SiliconValley/Chip/5014/
LEON-1 VHDL model Functional SPARC compatible processor core integer unit. Runs on Altera, Mietec, Temic MG2, Xilinx. Developed for space missions. Implemented as a highly configurable, synthesisable GPL VHDL model. http://www.estec.esa.nl/wsmwww/leon/
STM 32-bit, 2-way superscalar RISC processor, designed in a HDL. Source downloads. This one is actually working. http://www.asahi-net.or.jp/~uf8e-itu/
TRON VLSI CPU 32-bit microprocessor architecture developed to serve as the main hardware building block of the real-time TRON Hypernetwork (Highly Functional Distributed System: HFDS), which is the ultimate goal of the TRON Project. http://tronweb.super-nova.co.jp/tronvlsicpu.html

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